دانلود کتاب Quick Start Guide to Verilog by Brock J. LaMeres

دانلود کتاب Quick Start Guide to Verilogابوالفضل مظلوم بکاولی۱۳۹۸/۱۰/۱۹ ،۱۸:۴۷:۲۰ +۰۰:۰۰

خانه > Books > دانلود کتاب Quick Start Guide to Verilog

راهنمای سریع آموزش Verilog

Written the way the material is taught, enabling a bottom-up approach to learning which culminates with a high-level of learning, with a solid foundation

Emphasizes examples from which students can learn: contains a solved example for nearly every section in the book

Includes more than 400 exercise problems, as well as concept check questions for each section, tied directly to specific learning outcomes

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درباره کتاب

This textbook provides a starter’s guide to Verilog, to be used in conjunction with a one-semester course in Digital Systems Design, or on its own for readers who only need an introduction to the language. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the presentation with learning goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to “do” after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome.

Written the way the material is taught, enabling a bottom-up approach to learning which culminates with a high-level of learning, with a solid foundation;
Emphasizes examples from which students can learn: contains a solved example for nearly every section in the book;
Includes more than 200 exercise problems, as well as concept check questions for each section, tied directly to specific learning outcomes.

فهرست مطالب

Preface……Page 3
Contents……Page 4
1.1 History of Hardware Description Languages……Page 8
1.2 HDL Abstraction……Page 11
Concept Check……Page 14
1.3 The Modern Digital Design Flow……Page 15
Concept Check……Page 17
2.1 Data Types……Page 20
2.1.2 Net Data Types……Page 21
2.1.4 Vectors……Page 22
2.1.6 Expressing Numbers Using Different Bases……Page 23
2.2 Verilog Module Construction……Page 24
2.2.2 Port Definitions……Page 25
2.2.3 Signal Declarations……Page 26
2.2.5 Compiler Directives……Page 27
Concept Check……Page 28
3.1.2 Continuous Assignment……Page 30
3.1.3 Bitwise Logical Operators……Page 31
3.1.6 Relational Operators……Page 32
3.1.8 Concatenation Operator……Page 33
3.1.10 Numerical Operators……Page 34
3.1.11 Operator Precedence……Page 35
3.2.1 Logical Operator Example: SOP Circuit……Page 36
3.2.2 Logical Operator Example: One-Hot Decoder……Page 37
3.2.3 Logical Operator Example: 7-Segment Display Decoder……Page 38
3.2.4 Logical Operator Example: One-Hot Encoder……Page 41
3.2.6 Logical Operator Example: Demultiplexer……Page 43
3.3 Continuous Assignment with Conditional Operators……Page 44
3.3.1 Conditional Operator Example: SOP Circuit……Page 45
3.3.2 Conditional Operator Example: One-Hot Decoder……Page 46
3.3.4 Conditional Operator Example: One-Hot Decoder……Page 47
3.3.5 Conditional Operator Example: Multiplexer……Page 48
Concept Check……Page 49
3.4 Continuous Assignment with Delay……Page 50
Concept Check……Page 52
4.1.2.1 Explicit Port Mapping……Page 57
4.1.2.2 Positional Port Mapping……Page 58
4.1.3 Gate-Level Primitives……Page 59
4.1.4 User-Defined Primitives……Page 60
4.1.5 Adding Delay to Primitives……Page 61
4.2.2 Full Adders……Page 62
4.2.3 Ripple Carry Adder (RCA)……Page 64
4.2.4 Structural Model of a Ripple Carry Adder in Verilog……Page 65
Concept Check……Page 67
5.1.1 Procedural Blocks……Page 71
5.1.1.2 Always Blocks……Page 72
5.1.1.3 Sensitivity Lists……Page 73
5.1.2.1 Blocking Assignments……Page 74
5.1.2.2 Non-blocking Assignments……Page 75
5.1.4 Local Variables……Page 79
5.2.1 if-else Statements……Page 80
5.2.2 case Statements……Page 81
5.2.5 while Loops……Page 83
5.2.7 for Loops……Page 84
Concept Check……Page 85
5.3.1 Text Output……Page 86
5.3.2 File Input/Output……Page 87
5.3.3 Simulation Control and Monitoring……Page 89
Concept Check……Page 90
6.1.1 Generating Manual Stimulus……Page 94
6.1.2 Printing Results to the Simulator Transcript……Page 96
6.2 Using Loops to Generate Stimulus……Page 98
Concept Check……Page 99
6.3 Automatic Result Checking……Page 100
6.4 Using External Files in Test Benches……Page 101
Concept Check……Page 104
7.1.2 D-Flip-Flop……Page 107
7.1.3 D-Flip-Flop with Asynchronous Reset……Page 108
7.1.4 D-Flip-Flop with Asynchronous Reset and Preset……Page 109
7.1.5 D-Flip-Flop with Synchronous Enable……Page 110
7.2.1 Registers with Enables……Page 111
7.2.2 Shift Registers……Page 112
7.2.3 Registers as Agents on a Data Bus……Page 113
Concept Check……Page 115
8.1 The FSM Design Process and a Push-Button Window Controller Example……Page 117
8.1.1 Modeling the States……Page 118
8.1.3 The Next State Logic Block……Page 119
8.1.4 The Output Logic Block……Page 120
8.1.5 Changing the State Encoding Approach……Page 122
8.2.1 Serial Bit Sequence Detector in Verilog……Page 123
8.2.2 Vending Machine Controller in Verilog……Page 125
8.2.3 2-Bit, Binary Up/Down Counter in Verilog……Page 127
Concept Check……Page 129
9.1.1 Counters in Verilog Using the Type reg……Page 132
Concept Check……Page 133
9.2.2 Modeling Counters with Loads……Page 134
Concept Check……Page 135
10.1.1 Memory Map Model……Page 137
Concept Check……Page 138
10.2 Modeling Read-Only Memory……Page 139
Concept Check……Page 140
10.3 Modeling Read/Write Memory……Page 141
Concept Check……Page 142
11.1 Computer Hardware……Page 145
11.1.4 Central Processing Unit……Page 146
11.1.4.3 Data Path: Arithmetic Logic Unit (ALU)……Page 147
11.1.5 A Memory Mapped System……Page 148
11.2 Computer Software……Page 150
11.2.2.2 Direct Addressing (DIR)……Page 151
11.2.3.1 Loads and Stores……Page 152
11.2.3.2 Data Manipulations……Page 155
11.2.3.3 Branches……Page 156
11.3.1 Top-Level Block Diagram……Page 159
11.3.2 Instruction Set Design……Page 160
11.3.3 Memory System Implementation……Page 161
11.3.3.1 Program Memory Implementation in Verilog……Page 162
11.3.3.2 Data Memory Implementation in Verilog……Page 163
11.3.3.5 Memory data_out Bus Implementation in Verilog……Page 164
11.3.4 CPU Implementation……Page 165
11.3.4.1 Data Path Implementation in Verilog……Page 166
11.3.4.2 ALU Implementation in Verilog……Page 168
11.3.4.3 Control Unit Implementation in Verilog……Page 169
11.3.4.3.1 Detailed Execution of LDA_IMM……Page 172
11.3.4.3.2 Detailed Execution of LDA_DIR……Page 174
11.3.4.3.3 Detailed Execution of STA_DIR……Page 176
11.3.4.3.4 Detailed Execution of ADD_AB……Page 178
11.3.4.3.5 Detailed Execution of BRA……Page 180
11.3.4.3.6 Detailed Execution of BEQ……Page 182
Concept Check……Page 186
Worked Examples……Page 189
Index……Page 191

مشخصات کتاب

نویسنده: Brock J. LaMeres
موضوعات: کتاب آموزشی FPGA, کتاب آموزشی Verilog
برچسب ها: کتاب آموزشی Verilog, کتاب پیشنهادی, نمونه کد FPGA
ناشر کتاب: Springer
سال انتشار: 2019
نوع کتاب: PDF
تعداد صفحات کتاب: 190
حجم کتاب: 14 مگابایت
ISBN: 3030105512
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