[fullwidth background_color=”” background_image=”” background_parallax=”none” enable_mobile=”no” parallax_speed=”0.3″ background_repeat=”no-repeat” background_position=”left top” video_url=”” video_aspect_ratio=”16:9″ video_webm=”” video_mp4=”” video_ogv=”” video_preview_image=”” overlay_color=”” overlay_opacity=”0.5″ video_mute=”yes” video_loop=”yes” fade=”no” border_size=”0px” border_color=”” border_style=”” padding_top=”20″ padding_bottom=”20″ padding_left=”0″ padding_right=”0″ hundred_percent=”no” equal_height_columns=”no” hide_on_mobile=”no” menu_anchor=”” class=”” id=””][one_third last=”no” spacing=”yes” center_content=”no” hide_on_mobile=”no” background_color=”” background_image=”” background_repeat=”no-repeat” background_position=”left top” hover_type=”none” link=”” border_position=”all” border_size=”0px” border_color=”” border_style=”” padding=”” margin_top=”” margin_bottom=”” animation_type=”” animation_direction=”” animation_speed=”0.1″ animation_offset=”” class=”” id=””][imageframe lightbox=”no” gallery_id=”” lightbox_image=”” style_type=”none” hover_type=”none” bordercolor=”” bordersize=”0px” borderradius=”0″ stylecolor=”” align=”none” link=”” linktarget=”_self” animation_type=”0″ animation_direction=”down” animation_speed=”0.1″ animation_offset=”” hide_on_mobile=”no” class=”” id=””] [/imageframe][/one_third][one_third last=”no” spacing=”yes” center_content=”no” hide_on_mobile=”no” background_color=”” background_image=”” background_repeat=”no-repeat” background_position=”left top” hover_type=”none” link=”” border_position=”all” border_size=”0px” border_color=”” border_style=”” padding=”” margin_top=”” margin_bottom=”” animation_type=”” animation_direction=”” animation_speed=”0.1″ animation_offset=”” class=”” id=””][title size=”2″ content_align=”left” style_type=”default” sep_color=”” margin_top=”” margin_bottom=”” class=”” id=””]عنوان کامل کتاب[/title]

Partial Reconfiguration on FPGAs: Architectures, Tools and Applications

[title size=”2″ content_align=”left” style_type=”default” sep_color=”” margin_top=”” margin_bottom=”” class=”” id=””]نویسندگان[/title]

Dirk Koch

[title size=”2″ content_align=”left” style_type=”default” sep_color=”” margin_top=”” margin_bottom=”” class=”” id=””]سال انتشار[/title]

۲۰۱۳

[/one_third][one_third last=”yes” spacing=”yes” center_content=”no” hide_on_mobile=”no” background_color=”” background_image=”” background_repeat=”no-repeat” background_position=”left top” hover_type=”none” link=”” border_position=”all” border_size=”0px” border_color=”” border_style=”” padding=”” margin_top=”” margin_bottom=”” animation_type=”” animation_direction=”” animation_speed=”0.1″ animation_offset=”” class=”” id=””][button link=”http://www.amazon.com/Partial-Reconfiguration-FPGAs-Architectures-Applications/dp/1461412242″ color=”default” size=”” stretch=”default” type=”” shape=”” target=”_blank” title=”” gradient_colors=”|” gradient_hover_colors=”|” accent_color=”” accent_hover_color=”” bevel_color=”” border_width=”1px” icon=”” icon_position=”left” icon_divider=”no” modal=”” animation_type=”0″ animation_direction=”left” animation_speed=”1″ animation_offset=”” alignment=”center” class=”” id=””]لینک کتاب در آمازون[/button][separator style_type=”single” top_margin=”10″ bottom_margin=”10″ sep_color=”” border_size=”” icon=”” icon_circle=”” icon_circle_color=”” width=”” alignment=”center” class=”” id=””][button link=”http://s8.picofile.com/file/8318023318/28_Dirk_Koch_auth_Partial_Reconfiguration_on_FPGAs_Architectures_Tools_and_Applications_2013.rar.html” color=”default” size=”” stretch=”” type=”” shape=”” target=”_self” title=”” gradient_colors=”|” gradient_hover_colors=”|” accent_color=”” accent_hover_color=”” bevel_color=”” border_width=”1px” icon=”” icon_position=”right” icon_divider=”no” modal=”” animation_type=”0″ animation_direction=”left” animation_speed=”1″ animation_offset=”” alignment=”center” class=”” id=””]دریافت کتاب[/button][separator style_type=”single” top_margin=”10″ bottom_margin=”10″ sep_color=”” border_size=”” icon=”” icon_circle=”” icon_circle_color=”” width=”” alignment=”center” class=”” id=””]

حجم فایل: ۱۰ مگابایت

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پسورد فایل (دقت شود که زبان کیبرد فارسی باشد): پازج

[/one_third][/fullwidth][fullwidth background_color=”” background_image=”” background_parallax=”none” enable_mobile=”no” parallax_speed=”0.3″ background_repeat=”no-repeat” background_position=”left top” video_url=”” video_aspect_ratio=”16:9″ video_webm=”” video_mp4=”” video_ogv=”” video_preview_image=”” overlay_color=”” overlay_opacity=”0.5″ video_mute=”yes” video_loop=”yes” fade=”no” border_size=”0px” border_color=”” border_style=”” padding_top=”20″ padding_bottom=”20″ padding_left=”0″ padding_right=”0″ hundred_percent=”no” equal_height_columns=”no” hide_on_mobile=”no” menu_anchor=”” class=”” id=””][content_boxes settings_lvl=”child” layout=”icon-with-title” columns=”1″ icon_align=”left” title_size=”” title_color=”” body_color=”” backgroundcolor=”” icon_circle=”” icon_circle_radius=”” iconcolor=”” circlecolor=”” circlebordercolor=”” circlebordersize=”” outercirclebordercolor=”” outercirclebordersize=”” icon_size=”” icon_hover_type=”” hover_accent_color=”” link_type=”” link_area=”” link_target=”” animation_delay=”” animation_offset=”” animation_type=”” animation_direction=”left” animation_speed=”0.1″ margin_top=”” margin_bottom=”” class=”” id=””][content_box title=”درباره این کتاب” icon=”” backgroundcolor=”” iconcolor=”” circlecolor=”” circlebordercolor=”” circlebordersize=”” outercirclebordercolor=”” outercirclebordersize=”” iconrotate=”” iconspin=”no” image=”” image_width=”35″ image_height=”35″ link=”” linktext=”” link_target=”_self” animation_type=”0″ animation_direction=”down” animation_speed=”0.1″]

This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to gain resource and power efficiency, as well as to improve speed. Case studies in partial reconfiguration guide readers through the FPGA jungle, straight toward a working system. The discussion of partial reconfiguration is comprehensive and practical, with models introduced together with methods to implement efficiently the corresponding systems. Coverage includes concepts for partial module integration and corresponding communication architectures, floorplanning of the on-FPGA resources, physical implementation aspects starting from constraining primitive placement and routing all the way down to the bitstream required to configure the FPGA, and verification of reconfigurable systems.

• Provides comprehensive overview of state-of-the-art partial run-time reconfiguration techniques, including architectures, methods, and tools;
• Focuses on real applications that will benefit from partial reconfiguration;
• Describes methods and tools to implement efficient, reconfigurable systems that can substantially improve cost, power consumption, or speed (throughput/latency);
• Includes practical use-cases that act as design patterns for a wide range of applications.

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