Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.2 (WebPack) - P.28xd Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx9
Project ID (random number) 802449b4db3145dfb842381e99517daf.EA83C3B602F448498384A75CE7CF14A0.3 Target Package: tqg144
Registration ID __0_0_0 Target Speed: -2
Date Generated 2016-01-26T12:35:45 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i5-2450M CPU @ 2.50GHz CPU Speed 2494 MHz
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i5-2450M CPU @ 2.50GHz CPU Speed 2494 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=1
  • 32-bit adder=1
Comparators=1
  • 32-bit comparator greater=1
Counters=1
  • 32-bit up counter=1
RAMs=1
  • 16x8-bit single-port distributed Read Only RAM=1
Registers=5
  • Flip-Flops=5
MiscellaneousStatistics
  • AGG_BONDED_IO=29
  • AGG_IO=29
  • AGG_LOCED_IO=29
  • AGG_SLICE=29
  • NUM_BONDED_IOB=29
  • NUM_BSFULL=34
  • NUM_BSLUTONLY=72
  • NUM_BSREGONLY=3
  • NUM_BSUSED=109
  • NUM_BUFG=1
  • NUM_LOCED_IOB=29
  • NUM_LOGIC_O5ANDO6=10
  • NUM_LOGIC_O5ONLY=61
  • NUM_LOGIC_O6ONLY=33
  • NUM_LUT_RT_DRIVES_CARRY4=2
  • NUM_LUT_RT_EXO6=2
  • NUM_LUT_RT_O6=61
  • NUM_SLICEL=18
  • NUM_SLICEX=11
  • NUM_SLICE_CARRY4=18
  • NUM_SLICE_CONTROLSET=2
  • NUM_SLICE_CYINIT=180
  • NUM_SLICE_FF=37
  • NUM_SLICE_UNUSEDCTRL=18
  • NUM_UNUSABLE_FF_BELS=11
NetStatistics
  • NumNets_Active=160
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=1
  • NumNodesOfType_Active_BOUNCEIN=5
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=3
  • NumNodesOfType_Active_CLKPIN=11
  • NumNodesOfType_Active_CLKPINFEED=3
  • NumNodesOfType_Active_DOUBLE=110
  • NumNodesOfType_Active_GENERIC=35
  • NumNodesOfType_Active_GLOBAL=16
  • NumNodesOfType_Active_INPUT=16
  • NumNodesOfType_Active_IOBIN2OUT=26
  • NumNodesOfType_Active_IOBOUTPUT=26
  • NumNodesOfType_Active_LUTINPUT=169
  • NumNodesOfType_Active_OUTBOUND=122
  • NumNodesOfType_Active_OUTPUT=124
  • NumNodesOfType_Active_PADINPUT=18
  • NumNodesOfType_Active_PADOUTPUT=9
  • NumNodesOfType_Active_PINBOUNCE=32
  • NumNodesOfType_Active_PINFEED=199
  • NumNodesOfType_Active_QUAD=159
  • NumNodesOfType_Active_REGINPUT=5
  • NumNodesOfType_Active_SINGLE=113
  • NumNodesOfType_Vcc_GENERIC=2
  • NumNodesOfType_Vcc_HVCCOUT=22
  • NumNodesOfType_Vcc_IOBIN2OUT=2
  • NumNodesOfType_Vcc_IOBOUTPUT=2
  • NumNodesOfType_Vcc_LUTINPUT=71
  • NumNodesOfType_Vcc_PADINPUT=2
  • NumNodesOfType_Vcc_PINFEED=73
SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=14
  • IOB-IOBS=15
  • SLICEL-SLICEM=10
  • SLICEX-SLICEL=1
  • SLICEX-SLICEM=1
SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • CARRY4=18
  • HARD0=2
  • HARD1=1
  • IOB=29
  • IOB_IMUX=9
  • IOB_INBUF=9
  • IOB_OUTBUF=20
  • LUT5=71
  • LUT6=106
  • PAD=29
  • REG_SR=37
  • SLICEL=18
  • SLICEX=11
 
Configuration Data
IOB_OUTBUF
  • DRIVEATTRBOX=[12:20]
  • SLEW=[SLOW:20]
  • SUSPEND=[3STATE:20]
REG_SR
  • CK=[CK:37] [CK_INV:0]
  • LATCH_OR_FF=[FF:37]
  • SRINIT=[SRINIT0:34] [SRINIT1:3]
  • SYNC_ATTR=[ASYNC:37]
SLICEL
  • CLK=[CLK:1] [CLK_INV:0]
SLICEX
  • CLK=[CLK:10] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
BUFG_BUFG
  • I0=1
  • O=1
CARRY4
  • CIN=15
  • CO2=1
  • CO3=16
  • CYINIT=3
  • DI0=18
  • DI1=18
  • DI2=18
  • DI3=16
  • O0=16
  • O1=16
  • O2=16
  • O3=16
  • S0=18
  • S1=18
  • S2=18
  • S3=18
HARD0
  • 0=2
HARD1
  • 1=1
IOB
  • I=9
  • O=20
  • PAD=29
IOB_IMUX
  • I=9
  • OUT=9
IOB_INBUF
  • OUT=9
  • PAD=9
IOB_OUTBUF
  • IN=20
  • OUT=20
LUT5
  • A1=2
  • A2=5
  • A3=3
  • A4=3
  • A5=4
  • O5=71
LUT6
  • A1=6
  • A2=8
  • A3=8
  • A4=9
  • A5=103
  • A6=106
  • O6=106
PAD
  • PAD=29
REG_SR
  • CK=37
  • D=37
  • Q=37
SLICEL
  • A1=2
  • A2=2
  • A3=2
  • A4=2
  • A5=18
  • A6=18
  • AMUX=16
  • B1=2
  • B2=2
  • B3=2
  • B4=2
  • B5=18
  • B6=18
  • BMUX=16
  • C1=1
  • C2=1
  • C3=1
  • C4=1
  • C5=18
  • C6=18
  • CIN=15
  • CLK=1
  • CMUX=17
  • COUT=15
  • CX=1
  • D1=1
  • D2=1
  • D3=1
  • D4=1
  • D5=16
  • D6=18
  • DMUX=16
  • DQ=1
SLICEX
  • A=2
  • A2=2
  • A3=2
  • A4=2
  • A5=10
  • A6=10
  • AMUX=2
  • AQ=9
  • AX=1
  • B5=8
  • B6=8
  • BQ=9
  • BX=1
  • C5=8
  • C6=8
  • CLK=10
  • CQ=9
  • CX=1
  • D4=1
  • D5=7
  • D6=8
  • DQ=9
  • DX=1
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx9-tqg144-2 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc6slx9-tqg144-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 100 91 0 0 0 0 0
arwz 1 1 0 0 0 0 0
bitgen 294 294 0 0 0 0 0
createip 1 0 0 0 0 0 0
map 345 335 0 0 0 0 0
netgen 1 1 0 0 0 0 0
ngc2edif 49 49 0 0 0 0 0
ngcbuild 1 1 0 0 0 0 0
ngdbuild 361 360 0 0 0 0 0
par 336 315 20 0 0 0 0
trce 315 315 0 0 0 0 0
xps 4 2 0 0 0 0 0
xst 952 949 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/ise_c_overview.htm ( 14 ) /doc/usenglish/isehelp/ise_p_creating_a_new_source.htm ( 1 )
/doc/usenglish/isehelp/pn_db_define_vhdl_module.htm ( 1 ) /doc/usenglish/isehelp/pn_db_nsw_define_hdl_module.htm ( 1 )
/doc/usenglish/isehelp/pn_db_nsw_select_source_type.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2016-01-26T12:28:11
PROP_intWbtProjectID=EA83C3B602F448498384A75CE7CF14A0 PROP_intWbtProjectIteration=3
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_lockPinsUcfFile=changed PROP_AutoTop=true
PROP_DevFamily=Spartan6 PROP_DevDevice=xc6slx9
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=tqg144
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-2
PROP_PreferredLanguage=VHDL FILE_UCF=1
FILE_VHDL=1
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FD=37 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=8
NGDBUILD_NUM_INV=2 NGDBUILD_NUM_LUT1=63 NGDBUILD_NUM_LUT2=35 NGDBUILD_NUM_LUT4=4
NGDBUILD_NUM_LUT5=7 NGDBUILD_NUM_MUXCY=70 NGDBUILD_NUM_OBUF=20 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=64
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FD=37 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=8
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=2 NGDBUILD_NUM_LUT1=63 NGDBUILD_NUM_LUT2=35
NGDBUILD_NUM_LUT4=4 NGDBUILD_NUM_LUT5=7 NGDBUILD_NUM_MUXCY=70 NGDBUILD_NUM_OBUF=20
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=64
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx9-2-tqg144
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5